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Data Sheet
ROOT MEAN SQUARE MEASUREMENT
Root mean square (rms) is a measurement of the magnitude of
an ac signal. Specifically, the rms of an ac signal is equal to the
amount of dc required to produce an equivalent amount of power
in the load. The ADE7816 provides rms measurements on the
six current channels and the voltage channel simultaneously.
These measurements have a settling time of approximately 440 ms
with the integrator off and 500 ms with the integrator on. The
registers are updated every 125 μs. The rms value is measured
over a 2 kHz bandwidth.
The 24-bit, unsigned voltage rms measurement is available in the
ADE7816
VARNOLOAD (Address 0x43B0) registers. When in the no
load condition, the active and reactive energies are no longer
accumulated in the energy registers. Note that each of the six
channels has a separate no load circuit.
Setting the No Load Thresholds
The APNOLOAD and VARNOLOAD registers are compared
to the active and reactive powers, respectively, to set the no load
threshold. With full-scale inputs on both the current and voltage
channel, the maximum power is 0x1FF6A6B. The no load
threshold should, therefore, be set with respect to this maxi-
mum power, as follows:
VRMS register (Address 0x43C0). Similarly, the six current channel
APNOLOAD =
(5)
rms measurements are available in the IARMS (Address 0x43C1),
IBRMS (Address 0x43C2), ICRMS (Address 0x43C3), IDRMS
(Address 0x43C4), IERMS (0x43C5), and IFRMS (Address 0x43C6)
0x1FF6A6B × V % of Full_Scale × I (noload)% of Full_Scale
For example, if the nominal voltage is set to 50% of full scale
and the current channel no load threshold is required to be at
0.01% of full scale, the APNOLOAD threshold is
shows the IxRMS signal path. A similar signal path is used on
the voltage channel to compute the VRMS measurement.
APNOLOAD = 0x1FF6A6B × 50% × 0.01% = 0x68C
(6)
Due to nonidealities in the internal filtering, it is recommended
that the IxRMS registers be read synchronously to the zero-
crossing signal (see the Zero-Crossing Detection section). This
helps to stabilize reading-to-reading variation by removing the
effect of any 2ω ripple that is present on the rms measurement.
With the specified full-scale analog input signal of 0.5 V, the
rms value of a sinusoidal signal is 4,191,910 (0x3FF6A6),
independent of line frequency. If the integrator is enabled on
the current channels, the equivalent current rms value of a full-
scale sinusoidal signal at 50 Hz is 4,191,910 (0x3FF6A6). At
60 Hz, it is 3,493,258 (0x354D8A).
NO LOAD DETECTION
The ADE7816 includes a no load detection feature that eliminates
meter creep. Meter creep is defined as excess energy that is
accumulated by the meter when there is no load attached. The
ADE7816 warns of this condition and stops energy accumulation
if the energy falls below a programmable threshold. The ADE7816
includes a no load feature on the active and reactive energy
measurements. This allows a true no load condition to be
detected.
The no load condition is triggered when the absolute values of
the active and reactive powers are less than or equal to a thresh-
The VARNOLOAD register is usually set to the same value as
that of the APNOLOAD register. When the APNOLOAD and
VARNOLOAD registers are set to negative values, the no load
detection circuit is disabled.
Bit 0 (NLOAD1) in the STATUS1 register (Address 0xE503) is set
when the no load condition occurs on the A, B, or C current chan-
nel. Bit 1 (NLOAD2) in the STATUS1 register is set when the
load condition occurs on the D, E, or F current channel. Bits[5:0]
(NOLOADx) in the CHNOLOAD register (Address 0xE608)
can be used to determine which channel caused the no load
condition. When NOLOADx is cleared to 0, the channel is not in
a no load condition. When NOLOADx is set to 1, the channel is
in a no load condition.
No Load Interrupt
The ADE7816 includes two interrupts that are associated with
the no load feature. The first is associated with the A, B, and C
current channels, and it can be enabled by setting Bit 0 (NLOAD1)
in the MASK1 register (Address 0xE50B). The second interrupt
is associated with the D, E, and F current channels; it can be
enabled by setting Bit 1 (NLOAD2) in the MASK1 register. If
the corresponding interrupt is enabled, the no load condition
causes the external IRQ1 pin to go low (see the Interrupts
section).
old that is specified in the APNOLOAD (Address 0x43AF) and
IxRMSOS[23:0]
2 7
CURRENT SIGNAL FROM
HPF OR INTEGRATOR
(IF ENABLED)
x 2
LPF
√
IxRMS[23:0]
Figure 32. IxRMS Signal Path
Rev. A | Page 23 of 48
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